dao_pem.h

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/* SPDX-License-Identifier: Marvell-MIT
 * Copyright (c) 2023 Marvell.
 */
 
#ifndef __INCLUDE_DAO_PEM_H__
#define __INCLUDE_DAO_PEM_H__
 
#include <fcntl.h>
#include <inttypes.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <sys/mman.h>
#include <sys/stat.h>
#include <sys/types.h>
#include <unistd.h>
 
#include <rte_cycles.h>
#include <rte_eal.h>
#include <rte_hexdump.h>
#include <rte_lcore.h>
#include <rte_mbuf.h>
 
struct dao_pem_dev_conf {
    size_t host_page_sz;
};
 
/* End of structure dao_pem_dev_conf. */
 
#define DAO_PEM_CTRL_REGION_MAX 384
 
#define DAO_PEM_CTRL_REGION_MASK_MAX (RTE_ALIGN(DAO_PEM_CTRL_REGION_MAX, 64) / 64)
 
#define DAO_PEM_DEFAULT_HOST_PAGE_SZ (64 * 1024UL)
#define DAO_PEM_MAX_VFS 128
 
#define PEM_PFVF_DEV_ID_PF_MASK 0xF000
#define PEM_PFVF_DEV_ID_PF_SHIFT 12
#define PEM_PFVF_DEV_ID_VF_MASK 0x0FFF
#define PEM_PFVF_DEV_ID_VF_SHIFT 0
 
#define DAO_PEM_DEV_ID_MAX 2
 
int dao_pem_dev_init(uint16_t pem_devid, struct dao_pem_dev_conf *conf);
 
int dao_pem_dev_fini(uint16_t pem_devid);
 
typedef int (*dao_pem_ctrl_region_cb_t)(void *ctx, uintptr_t shadow, uint32_t off, uint64_t val,
                    uint64_t shadow_val);
 
int dao_pem_ctrl_region_register(uint16_t pem_devid, uintptr_t base, uint32_t len,
                 dao_pem_ctrl_region_cb_t cb, void *ctx, bool sync_shadow);
int dao_pem_ctrl_region_unregister(uint16_t pem_devid, uintptr_t base, uint32_t len,
                   dao_pem_ctrl_region_cb_t cb, void *ctx);
 
int dao_pem_vf_region_info_get(uint16_t pem_devid, uint16_t dev_id, uint8_t bar_idx,
                   uint64_t *addr, uint64_t *size);
 
size_t dao_pem_host_page_sz(uint16_t pem_devid);
 
uint8_t dao_pem_host_interrupt_setup(uint16_t pem_devid, int vfid, uint64_t **intr_addr);
 
uint16_t dao_pem_max_vfs_get(uint16_t pem_devid);
#endif /* __INCLUDE_DAO_PEM_H__ */