dao_eth_trs.h

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/* SPDX-License-Identifier: Marvell-Proprietary
 * Copyright (c) 2025 Marvell
 */
#ifndef __DAO_ETH_TRANSPORT_H__
#define __DAO_ETH_TRANSPORT_H__
 
#include <rte_common.h>
 
#include <stdint.h>
 
#include <rte_ethdev.h>
#include <rte_mempool.h>
 
/* Maximum eth ports supported by an ethernet transport device */
#define DAO_MAX_ETH_TRS_PORTS 64
 
enum dao_eth_trs_op_type {
    DAO_ETH_TRS_OP_TYPE_REFLECT = 0x0,
    DAO_ETH_TRS_OP_TYPE_CRYPTO_START = 0x1000,
    DAO_ETH_TRS_OP_TYPE_CRYPTO_MISC,
    DAO_ETH_TRS_OP_TYPE_CRYPTO_SYM,
    DAO_ETH_TRS_OP_TYPE_CRYPTO_ASYM,
    DAO_ETH_TRS_OP_TYPE_CRYPTO_OAEP_ENC,
    DAO_ETH_TRS_OP_TYPE_CRYPTO_OAEP_DEC,
    DAO_ETH_TRS_OP_TYPE_CRYPTO_RNG,
    DAO_ETH_TRS_OP_TYPE_CRYPTO_PQC,
    DAO_ETH_TRS_OP_TYPE_SYM_SESSION_CREATE,
    DAO_ETH_TRS_OP_TYPE_SYM_SESSION_DESTROY,
    DAO_ETH_TRS_OP_TYPE_CRYPTO_PSS_SIGN,
    DAO_ETH_TRS_OP_TYPE_CRYPTO_PSS_VERIFY,
    DAO_ETH_TRS_OP_TYPE_CRYPTO_END = 0x1fff,
 
    DAO_ETH_TRS_OP_TYPE_COMPRESS_START = 0x2000,
    DAO_ETH_TRS_OP_TYPE_COMPRESS,
    DAO_ETH_TRS_OP_TYPE_DECOMPRESS,
    DAO_ETH_TRS_OP_TYPE_COMPRESS_END = 0x20ff,
};
 
/* Structure dao_eth_trs_hdr 8< */
struct __rte_packed_begin dao_eth_trs_hdr {
    uint16_t op_type;
    uint16_t op_len;
} __rte_packed_end;
/* >8 End of structure dao_eth_trs_hdr. */
 
/* Structure dao_eth_trs_pkt 8< */
struct __rte_packed_begin dao_eth_trs_pkt {
    struct dao_eth_trs_hdr hdr;
    uint8_t data[];
} __rte_packed_end;
/* >8 End of structure dao_eth_trs_pkt. */
 
struct dao_eth_trs_dev_config {
    uint16_t nb_queues;  
    uint8_t promiscuous; 
};
 
struct dao_eth_trs_queue_config {
    uint16_t queue_size;       
    struct rte_mempool *rx_mp; 
};
 
struct dao_eth_trs_info {
    uint8_t nb_devs;         
    uint16_t nb_queues;      
    uint16_t min_queue_size; 
    uint16_t max_queue_size; 
    uint32_t min_buf_len;    
    uint32_t max_pkt_len;    
};
 
struct dao_eth_trs_port_info {
    uint32_t nb_ports;
    uint32_t nb_queues;
    uint32_t oct_dev_id[DAO_MAX_ETH_TRS_PORTS];
};
 
#define dao_eth_trs_tx rte_eth_tx_burst 
#define dao_eth_trs_rx rte_eth_rx_burst 
int dao_eth_trs_init(void);
 
int dao_eth_trs_fini(void);
 
int dao_eth_trs_info(struct dao_eth_trs_info *info);
 
int dao_eth_trs_dev_alloc(uint8_t dev_id, struct dao_eth_trs_dev_config *config);
 
int dao_eth_trs_dev_queue_configure(uint8_t dev_id, uint16_t queue_id,
                    struct dao_eth_trs_queue_config *conf);
 
int dao_eth_trs_dev_queue_map(uint8_t dev_id, uint16_t dev_queue_id, uint16_t *port_id,
                  uint16_t *queue_id);
 
int dao_eth_trs_dev_start(uint8_t dev_id);
 
int dao_eth_trs_dev_stop(uint8_t dev_id);
 
int dao_eth_trs_dev_free(uint8_t dev_id);
 
int dao_eth_trs_port_info_get(uint8_t dev_id, struct dao_eth_trs_port_info *port_info);
#endif /*  __DAO_ETH_TRANSPORT_H__ */